AT32F403AVGT7 Microcontroller Metering Chip

  • AT32F403AVGT7 Microcontroller Metering Chip
  • AT32F403AVGT7 Microcontroller Metering Chip
  • AT32F403AVGT7 Microcontroller Metering Chip
  • AT32F403AVGT7 Microcontroller Metering Chip
AT32F403AVGT7 Microcontroller Metering Chip

The AT32F403A is based on the high-performance ARM®Cortex® -M4 32-bit RISC core running up to 240 MHz. The Cortex® -M4 core features a Floating point unit (FPU) single precision which supports all ARM® single-precision data processing instructions and data type. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.

AT32F403AVGT7

The AT32F403A incorporates high-speed embedded memories (up to 1024 KBytes of internal Flash memory, 96+128 KBytes of SRAM), the extensive external SPI Flash (up to 16 MBytes addressing capability), and enhanced GPIOs and peripherals connected to two APB buses. Any block of the embedded Flash memory can be protected by the “sLib”, functioning as a security area with code-excutable only.

The AT32F403A offers three 12-bit ADC, two 12-bit DAC, eight general-purpose 16-bit timers plus two general-purpose 32-bit timers, and up to two PWM timers for motor control. It supports standard and advanced communication interfaces: up to three I2Cs, four SPIs (all multiplexed as I2Ss), two SDIOs, eight USARTs/UARTs, an USBFS, and two CANs.

The AT32F403A operates in the -40 to +105 °C temperature range, from a 2.6 to 3.6 V power supply. A comprehensive set of power-saving mode allows the design of low-power application.

The AT32F403A offers devices in different package types. Depending on the different packages, the pin-to-pin is completely compatible among devices, and also the software and functionality.  Only different sets of peripherals are included.


Features:

Core: ARM® 32-bit Cortex® -M4 CPU with FPU

− 240 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division

− Floating point unit (FPU) and

− DSP instructions

Memories

− 1024 KBytes of internal Flash memory

− sLib: configurable part of main Flash set as a libruary area with code excutable but secured, non-readable

− SPIM interface: Extra interfacing up to 16 Mbytes of the external SPI Flash (as instruction/data memory)

− Up to 96+128 KBytes of SRAM

− External memory controller (XMC) with 16- bit data bus. Supports multiplexed PSRAM/NOR and NAND memories

Packages

− LQFP100 14*14 mm


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